We have some UVIA to SMD PIN placement. It is possible that we have some uvia offset by pad center (Die size changes / copy / paste). Is it possible to check / flag DRC’s?
FC bump : (-7710.50 -3451.18)Via : (-7710.50 -3453.70)
Note : Via is offset from center of FC pad by 2 um and it should be placed at center.
In the CMS we have enabled SMD pin to Microvia / BB via option, eventhough it's not flagginf DRC's bcoz the Via size is smaller than pad size. Rite now we are reducing the pad size & checking the DRC"s later increasing the pad sizes :-(